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| 1 LTC4008 4008fa typical applicatio u applicatio s u descriptio u features general purpose charger controller high conversion efficiency: up to 96% output currents exceeding 4a 0.8% voltage accuracy ac adapter current limiting maximizes charge rate* thermistor input for temperature qualified charging wide input voltage range: 6v to 28v wide output voltage: 3v to 28v 0.5v dropout voltage; maximum duty cycle: 98% programmable charge current: 4% accuracy indicator outputs for charging, c/10 current detection, ac adapter present, input current limiting and faults charging current monitor output available in a 20-pin narrow ssop package 4a, high efficiency, multi-chemistry battery charger the ltc 4008 is a constant-current/constant-voltage charger controller. the pwm controller uses a synchro- nous, quasi-constant frequency, constant off-time archi- tecture that will not generate audible noise even when using ceramic capacitors. charging current is program- mable with a sense resistor and programming resistor to 4% typical accuracy. charging current can be monitored as a voltage across the programming resistor. an external resistor divider and precision internal reference set the final float voltage. the LTC4008 includes a thermistor sensor input that will suspend charging if an unsafe temperature condition is detected and will automatically resume charging when battery temperature returns to within safe limits; a fault pin indicates this condition. a flag pin indicates when charging current has decreased below 10% of the pro- grammed current. an external sense resistor programs ac adapter current limiting. the i cl pin indicates when the charging current is being reduced by input current limiting so that the charging algorithm can adapt. notebook computers portable instruments battery backup systems 12.3v, 4a li-ion charger batmon v fb i cl acp/shdn fault flag ntc r t i th gnd i cl acp fault flag dcin infet clp cln tgate bgate pgnd csp bat prog LTC4008 32.4k 0.47 f thermistor 10k ntc 0.12 f 100k 100k 140k* 15k* 6.04k 150k v logic dcin 0v to 28v 0.1 f input switch 0.1 f q1 q2 20 f 10 h 4.99k 3.01k 3.01k 0.025 ? 0.02 ? 20 f system load li-ion battery charging current monitor 26.7k q1: si4431bdy q2: fdc645n 0.0047 f 4008 ta01 note: * 0.25% tolerance all other resistors are 1% tolerance *protected by u.s. patents including 5723970 , ltc and lt are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
2 LTC4008 4008fa voltage from dcin, clp, cln to gnd ....... +32v/ 0.3 v pgnd with respect to gnd .................................. 0.3v csp, bat to gnd ........................................ +28v/ 0.3v v fb , r t to gnd ............................................. +7v/ 0.3v ntc ............................................................. +10v/ 0.3v acp/shdn, flag, fault, i cl .................... +32v/ 0.3v absolute m axi m u m ratings w ww u package/order i n for m atio n w u u order part number LTC4008egn t jmax = 125 c, ja = 90 c/w consult ltc marketing for parts specified with wider operating temperature ranges. gn package 20-lead narrow plastic ssop 1 2 3 4 5 6 7 8 9 10 top view 20 19 18 17 16 15 14 13 12 11 infet bgate pgnd tgate clp cln flag batmon bat csp dcin i cl acp/shdn r t fault gnd v fb ntc i th prog clp to cln ........................................................... +0.5v operating ambient temperature range (note 4) ............................................... 40 c to 85 c operating junction temperature ........... 40 c to 125 c storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c (note 1) order part number LTC4008egn-1 the denotes specifications which apply over the full operating temperature range (note 4), otherwise specifications are at t a = 25 c. v dcin = 20v, v bat = 12v unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units dcin operating range 628v i q operating current charging sum of current from clp, cln, dcin 3 5 ma v tol voltage accuracy (notes 2, 5) ?.8 0.8 % ?.0 1.0 % batmon error (note 5) measured from bat to batmon, 0 35 80 mv r load = 100k i tol charge current accuracy (note 3) v csp ?v bat target = 100mv 4 4 % ? 5 % shutdown battery leakage current dcin = 0v (LTC4008 only) 20 35 a acp/shdn = 0v ?0 10 a uvlo undervoltage lockout threshold dcin rising, v bat = 0v 4.2 4.7 5.5 v shutdown threshold at acp/shdn 1 1.6 2.5 v operating current in shutdown v shdn = 0v, sum of current from clp, 2 3 ma cln, dcin t jmax = 125 c, ja = 90 c/w gn package 20-lead narrow plastic ssop 1 2 3 4 5 6 7 8 9 10 top view 20 19 18 17 16 15 14 13 12 11 nc bgate pgnd tgate clp cln flag batmon bat csp dcin i cl shdn r t fault gnd v fb ntc i th prog the LTC4008egn-1 does not have the input fet function order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ 3 LTC4008 4008fa the denotes specifications which apply over the full operating temperature range (note 4), otherwise specifications are at t a = 25 c. v dcin = 20v, v bat = 12v unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units current sense amplifier, ca1 input bias current into bat pin 11.66 a cmsl ca1/i 1 input common mode low 0v cmsh ca1/i 1 input common mode high v dcin 28v v cln ?0.2 v v os input voltage offset 3.5 3.5 mv current comparators i cmp and i rev i tmax maximum current sense threshold (v csp ?v bat )v ith = 2.5v 140 165 200 mv i trev reverse current threshold (v csp ?v bat ) 30mv current sense amplifier, ca2 transconductance 1 mmho source current measured at i th , v ith = 1.4v 40 a sink current measured at i th , v ith = 1.4v 40 a current limit amplifier transconductance 1.4 mmho v clp current limit threshold 93 100 107 mv i cln cln input bias current 100 na voltage error amplifier, ea transconductance 1 mmho v ref reference voltage used to calculate v float 1.19 v i bea input bias current 4 25 na sink current measured at i th , v ith = 1.4v 36 a ovsd overvoltage shutdown threshold as a percent 102 107 110 % of programmed charger voltage input p-channel fet driver (infet) (LTC4008 only) dcin detection threshold (v dcin ?v clp ) dcin voltage ramping up 0 0.17 0.25 v from v clp ?0.1v forward regulation voltage (v dcin ?v clp ) 25 50 mv reverse voltage turn-off voltage (v dcin ?v clp ) dcin voltage ramping down ?0 ?5 mv infet ?n?clamping voltage (v clp ?v infet )i infet = 1 a 5 5.8 6.5 v infet ?ff?clamping voltage (v clp ?v infet )i infet = 25 a 0.25 v thermistor ntcvr reference voltage during sample time 4.5 v high threshold v ntc rising ntcvr ntcvr ntcvr v ?0.48 ?0.5 ?0.52 low threshold v ntc falling ntcvr ntcvr ntcvr v ?0.115 ?0.125 ?0.135 thermistor disable current v ntc 10v 10 a indicator outputs (acp/ shdn, flag, i cl , fault c10tol flag (c/10) accuracy voltage falling at prog 0.375 0.397 0.420 v i cl threshold accuracy v clp ?v cln 83 93 105 mv v ol low logic level of acp/shdn, flag, i cl , fault i ol = 100 a 0.5 v v oh high logic level of acp/shdn, i cl i oh = ? a 2.7 v i off off state leakage current of flag, fault v oh = 3v ? 1 a i po pull-up current on acp/shdn, i cl v = 0v 10 a 4 LTC4008 4008fa typical perfor a ce characteristics uw infet response time to reverse current v fb vs dcin batmon offset test performed on demoboard v in = 15vdc charger = on i charge = <10ma v s of pfet (5v/div) i d (reverse) of pfet (5a/div) v gs of pfet (2v/div) 4008 g01 v charge = 12.6v infet = 1/2 si4925dy v gs = 0 v s = 0v i d = 0a 1.25 s/div dcin (v) 6 11162126 v fb (%) 4008 g02 0.05 0 ?.05 ?.10 ?.15 ?.20 battery voltage (v) 3 8 13 18 23 v battery - v batmon (v) 4008 g03 0.02 0 ?.02 ?.04 ?.06 ?.08 ?.10 dcin = 15v dcin = 20v dcin = 24v batmon load = 100k ? the denotes specifications which apply over the full operating temperature range (note 4), otherwise specifications are at t a = 25 c. v dcin = 20v, v bat = 12v unless otherwise noted. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: see test circuit. note 3: does not include tolerance of current sense resistor or current programming resistor. note 4: the LTC4008e is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the 40 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 5: voltage accuracy includes batmon error and voltage reference error. does not include error of external resistor divider. electrical characteristics symbol parameter conditions min typ max units oscillator f osc regulator switching frequency 255 300 345 khz f min regulator switching frequency in drop out duty cycle 98% 20 25 khz dc max regulator maximum duty cycle v csp = v bat 98 99 % gate drivers (tgate, bgate) v tgate high (v clp ?v tgate )i tgate = 1ma 50 mv v bgate high c load = 3000pf 5.6 10 v v tgate low (v clp ?v tgate )c load = 3000pf 5.6 10 v v bgate low i bgate = 1ma 50 mv tgate transition time tgtr tgate rise time c load = 3000pf, 10% to 90% 50 110 ns tgtf tgate fall time c load = 3000pf, 10% to 90% 50 100 ns bgate transition time bgtr bgate rise time c load = 3000pf, 10% to 90% 40 90 ns bgtf bgate fall time c load = 3000pf, 10% to 90% 40 80 ns v tgate at shutdown (v clp ?v tgate )i tgate = ? a, dcin = 0v, clp = 12v 100 mv v bgate at shutdown i bgate = 1 a, dcin = 0v, clp = 12v 100 mv (t a = 25 c unless otherwise noted) 5 LTC4008 4008fa v out vs i out pwm frequency vs duty cycle disconnect/reconnect battery (load dump) battery leakage current vs battery voltage duty cycle (v out /v in ) 0 0.1 0.2 0.4 0.6 0.9 0.8 0.3 0.5 0.7 1.0 pwm frequency (khz) 4008 g05 programmed current = 10% dcin = 15v dcin = 20v dcin = 24v 350 300 250 200 150 100 50 0 output current (a) 0 0.5 1.0 2.0 3.0 4.0 1.5 2.5 3.5 4.5 output voltage error (%) 4008 g04 dcin = 20v v bat = 12.6v 0 ?.5 ?.0 ?.5 ?.0 ?.5 ?.0 ?.5 ?.0 ?.5 ?.0 4008 g06 load current = 1a, 2a, 3a dcin = 20v v float = 12.6v v float 1v/(div) load state disconnect reconnect 1a step 3a step 3a step 1a step battery voltage (v) 0 5 10 15 20 25 30 battery leakage current ( a) 4008 g07 40 35 30 25 20 15 10 5 0 vdcin = 0v typical perfor a ce characteristics uw (t a = 25 c unless otherwise noted) efficiency at 19vdc v in charge current (a) 1.00 0.50 1.50 2.00 2.50 3.00 efficiency ( % ) 4008 g09 16.8v 12.6v 100 95 90 85 80 75 efficiency at 12.6v with 15vdc v in charge current (a) 1.00 0.50 1.50 2.00 2.50 3.00 efficiency ( % ) 4008 g10 100 95 90 85 80 75 charging voltage error temp = 27 c, i load = 0.120a charging voltage (v) 0 output voltage error (v) 0.150 0.100 0.125 0.075 0.050 0 0.025 ?.025 ?.050 ?.075 ?.100 ?.125 ?.150 16 4008 g11 4 2 6 10 14 18 8 12 22 20 dcin = 15v dcin = 20v 6 LTC4008 4008fa uu u pi fu ctio s dcin (pin 1): external dc power source input. bypass this pin with at least 0.01 f. see applications information section. i cl (pin 2): input current limit indicator. active low digital output. internal 10 a pull-up to 3.5v. pulled low if the charger current is being reduced by the input current limiting function. the pin is capable of sinking at least 100 a. if v logic > 3.3v, add an external pull-up. acp/shdn (pin 3): open-drain output used to indicate if the ac adapter voltage is adequate for charging. active high digital output. internal 10 a pull-up to 3.5v. the charger can also be shutdown by pulling this pin below 1v. the pin is capable of sinking at least 100 a. if v logic > 3.3v, add an external pull-up. (LTC4008-1: acp function disabled.) r t (pin 4): thermistor clocking resistor. use a 150k resistor as a nominal value. this resistor is always re- quired. if this resistor is not present, the charger will not start. fault (pin 5): active low open-drain output that indicates that charger operation has suspended due to the ther- mistor exceeding allowed values. a pull-up resistor is required if this function is used. the pin is capable of sinking at least 100 a. gnd (pin 6): ground for low power circuitry. v fb (pin 7): input of voltage feedback error amplifier, ea, in the block diagram. ntc (pin 8): a thermistor network is connected from ntc to gnd. this pin determines if the battery temperature is safe for charging. the charger and timer are suspended and the fault pin is driven low if the thermistor indicates a temperature that is unsafe for charging. the thermistor function may be disabled with a 300k to 500k resistor from dcin to ntc. i th (pin 9): control signal of the inner loop of the current mode pwm. higher i th voltage corresponds to higher charging current in normal operation. a 6k resistor in series with a capacitor of at least 0.1 f to gnd provides loop compensation. typical full-scale output current is 40 a. nominal voltage range for this pin is 0v to 3v. prog (pin 10): current programming/monitoring input/ output. an external resistor to gnd programs the peak charging current in conjunction with the current sensing resistor. the voltage at this pin provides a linear indication of charging current. peak current is equivalent to 1.19v. zero current is approximately 0.309v. a capacitor from prog to ground is required to filter higher frequency components. the maximum program resistance to ground is 100k. values higher than 100k can cause the charger to shut down. csp (pin 11): current amplifier ca1 input. the csp and bat pins measure the voltage across the sense resistor, r sense , to provide the instantaneous current signals re- quired for both peak and average current mode operation. bat (pin 12): battery sense input and the negative reference for the current sense resistor. batmon (pin 13): output voltage representing battery voltage. switched off to reduce standby current drain when ac is not present. an external voltage divider from batmon to v fb sets the charger float voltage. recom- mended minimum load resistance is 100k. flag (pin 14): active low open-drain output that indicates when charging current has declined to 10% of max pro- grammed current. a pull-up resistor is required if this function is used. the pin is capable of sinking at least 100 a. this function is latching. to clear it, user must cycle the acp/shdn pin. cln (pin 15): negative input to the input current limiting amplifier cl1. the threshold is set at 100mv below the voltage at the clp pin. when used to limit input current, a filter is needed to filter out the switching noise. if no current limit function is desired, connect this pin to clp. clp (pin 16): this pin serves as a positive reference for the input current limit amplifier, cl1. it also serves as the power supply for the ic. tgate (pin 17): drives the top external pmosfet of the battery charger buck converter. pgnd (pin 18): high current ground return for bgate driver. bgate (pin 19): drives the bottom external n-mosfet of the battery charger buck converter. infet (pin 20): drives the gate of the external input p-mosfet. (LTC4008-1: no connection) 7 LTC4008 4008fa block diagra w + 6 9k 1.19v 11.67 a 35mv c/ 10 tbad ea g m = 1m g m = 1m 1.19v flag gnd 7 13 2 17 i cl tgate bgate q1 q2 16 clp 100mv 0.1 f 20 f r cl 5k 15 cln 19 pgnd l1 397mv r t ntc 0.47 f 10k ntc 150k + + cl1 g m = 1.4m control block thermistor oscillator 4 8 bat 3k r sense csp i th 9 32.4k watchdog detect t off clp dcin ov oscillator 1.28v pwm logic s r q charge + i cmp + 5 buffered i th 18 0.1 f prog 4008 bd r prog 26.7k 4.7nf 10 14 fault 5 acp/shdn 3 infet* q3 dcin v in 20 1 + clp + 5.8v *not used in the LTC4008-1 3k 20 f 6k 0.12 f 12 11 + ca1 ca2 + ? ? ? v fb batmon i rev + + ** 17mv 8 LTC4008 4008fa test circuit + + + ea lt1055 LTC4008 v ref bat 7 13 12 csp 11 i th 0.6v 4008 tc 9 batmon 90.325k 9.675k v fb overview the LTC4008 is a synchronous current mode pwm step down (buck) switcher battery charger controller. the charge current is programmed by the combination of a program resistor (r prog ) from the prog pin to ground and a sense resistor (r sense ) between the csp and bat pins. the final float voltage is programmed with an exter- nal resistor divider and the internal 1.19v reference volt- age. charging begins when the potential at the dcin pin rises above the voltage at bat (and the uvlo voltage) and the acp/shdn pin is high. an external thermistor network is sampled at regular intervals. if the thermistor value exceeds design limits, charging is suspended and the fault pin is set low. if the thermistor value returns to an acceptable value, charging resumes and the fault pin is set high. an external resistor on the r t pin sets the sampling interval for the thermistor. operatio u as the battery approaches the final float voltage, the charge current will begin to decrease. when the current drops to 10% of the full-scale charge current, an internal c/10 comparator will indicate this condition by latching the flag pin low. if this condition is caused by an input current limit condition, described below, then the flag indicator will be inhibited. when the input voltage is not present, the charger goes into a sleep mode, dropping battery current drain to 15 a. this greatly reduces the current drain on the battery and increases the standby time. the charger can be inhibited at any time by forcing the acp/shdn pin to a low voltage. forcing acp/shdn low, or removing the voltage from dcin, will also clear the flag pin if it is low. table 1. truth table for indicator states mode dcin acp/shdn flag** fault** i cl shutdown by low adapter voltage (disabled on LTC4008-1) 10 LTC4008 4008fa if the charging current decreases below 10% to 15% of programmed current, while engaged in input current limiting, bgate will be forced low to prevent the charger from discharging the battery. audible noise can occur in this mode of operation. an overvoltage comparator guards against voltage tran- sient overshoots (>7% of programmed value). in this case, both mosfets are turned off until the overvoltage condition is cleared. this feature is useful for batteries which ?oad dump?themselves by opening their protec- tion switch to perform functions such as calibration or pulse mode charging. pwm watchdog timer there is a watchdog timer that observes the activity on the bgate and tgate pins. if tgate stops switching for more than 40 s, the watchdog activates and turns off the top mosfet for about 400ns. the watchdog engages to prevent very low frequency operation in dropout which is a potential source of audible noise when using ceramic input and output capacitors. charger startup when the charger is enabled, it will not begin switching until the i th voltage exceeds a threshold that assures initial current will be positive. this threshold is 5% to 15% of the maximum programmed current (100mv/r sense ). after the charger begins switching, the various loops will control the current at a level that is higher or lower than the initial current. the duration of this transient condition depends upon the loop compensation but is typically less than 100 s. thermistor detection the thermistor detection circuit is shown in figure 3. it requires an external resistor and capacitor in order to function properly. operatio u i charge (% of maximum current) 0 0 v prog (v) 0.2 0.4 0.6 0.8 4008 f02 1.0 1.2 20 40 60 80 100 1.19v 0.309v figure 2. v prog vs i charge 8 ntc LTC4008 s1 r10 32.4k c7 0.47 f r th 10k ntc + + + 60k ~4.5v clk 45k 15k tbad 4008 f03 d c q figure 3 11 LTC4008 4008fa operatio u clk (not to scale) v ntc t sample voltage across thermistor t hold 4008 f04 comparator high limit comparator low limit figure 4 the thermistor detector performs a sample-and-hold func- tion. an internal clock, whose frequency is determined by the timing resistor connected to r t , keeps switch s1 closed to sample the thermistor: t sample = 127.5 ?20 ?r rt ?17.5pf = 6.7ms, for r rt = 150k the external rc network is driven to approximately 4.5v and settles to a final value across the thermistor of: v vr rr rth final th th () . = + 45 10 this voltage is stored by c7. then the switch is opened for a short period of time to read the voltage across the thermistor. t hold = 10 ?r rt ?17.5pf = 26 s, for r rt = 150k when the t hold interval ends the result of the thermistor testing is stored in the d flip-flop (dff). if the voltage at ntc is within the limits provided by the resistor divider feeding the comparators, then the nor gate output will be low and the dff will set t bad to zero and charging will continue. if the voltage at ntc is outside of the resistor divider limits, then the dff will set t bad to one, the charger will be shut down, fault pin is set low and the timer will be suspended until t bad returns to zero (see figure 4). 12 LTC4008 4008fa applicatio s i for atio wu uu r z 102k c prog 4008 f05 LTC4008 prog q1 2n7002 r prog 0v 5v 10 figure 5. pwm current programming charger current programming the basic formula for charging current is: i vkr v r charge max ref prog sense () ? / . = ? 3 01 0 035 v ref = 1.19v. this leaves two degrees of freedom: r sense and r prog . the 3.01k input resistors must not be altered since internal currents and voltages are trimmed for this value. pick r sense by setting the average voltage between csp and bat to be close to 100mv during maximum charger current. then r prog can be determined by solving the above equation for r prog . r vk ri v prog ref sense charge max = ? + ? ? () 301 0 035 table 2. recommended r sns and r prog resistor values i max (a) r sense ( ? ) 1% r sense (w) r prog (k ? ) 1% 1.0 0.100 0.25 26.7 2.0 0.050 0.25 26.7 3.0 0.033 0.5 26.7 4.0 0.025 0.5 26.7 charging current can be programmed by pulse width modulating r prog with a switch q1 to r prog at a fre- quency higher than a few khz (figure 5). c prog must be increased to reduce the ripple caused by the r prog switching. the compensation capacitor at i th will prob- ably need to be increased also to improve stability and prevent large overshoot currents during start-up condi- tions. charging current will be proportional to the duty cycle of the switch with full current at 100% duty cycle and zero current when q1 is off. maintaining c/10 accuracy the c/10 comparator threshold that drives the flag pin has a fixed threshold of approximately v prog = 400mv. this threshold works well when r prog is 26.7k, but will not yield a 10% charging current indication if r prog is a different value. there are situations where a standard value of r sense will not allow the desired value of charging current when using the preferred r prog value. in these cases, where the full-scale voltage across r sense is within 20mv of the 100mv full-scale target, the input resistors connected to csp and bat can be adjusted to provide the desired maximum programming current as well as the correct flag trip point. for example, the desired max charging current is 2.5a but the best r sense value is 0.033 ? . in this case, the voltage across r sense at maximum charging current is only 82.5mv, normally r prog would be 30.1k but the nominal flag trip point is only 5% of maximum charging current. if the input resistors are reduced by the same amount as the full-scale voltage is reduced then, r4 = r5 = 2.49k and r prog = 26.7k, the maximum charging current is still 2.5a but the flag trip point is maintained at 10% of full scale. there are other effects to consider. the voltage across the current comparator is scaled to obtain the same values as the 100mv sense voltage target, but the input referred sense voltage is reduced, causing some careful consider- ation of the ripple current. input referred maximum com- parator threshold is 117mv, which is the same ratio of 1.4x the dc target. input referred i rev threshold is scaled back to ?4mv. the current at which the switcher starts will be reduced as well so there is some risk of boost activity. these concerns can be addressed by using a slightly larger inductor to compensate for the reduction of tolerance to ripple current. 13 LTC4008 4008fa applicatio s i for atio wu uu battery conditioning some batteries require a small charging current to condi- tion them when they are severely depleted. the charging current is switched to a high rate after the battery voltage has reached a ?afe?voltage to do so. figure 6 illustrates how to do this 2-level charging. when q1 is on, the charger current is set to maximum. when q1 is off, the charging current is set to 10% of the maximum. table 3 float voltage (v) r9 (k ? ) 0.25% r8 (k ? ) 0.25% 8.2 24.9 147 8.4 26.1 158 12.3 15 140 12.6 16.9 162 16.4 11.5 147 16.8 13.3 174 soft-start the LTC4008 is soft started by the 0.12 f capacitor on the i th pin. on start-up, i th pin voltage will rise quickly to 0.5v, then ramp up at a rate set by the internal 40 a pull-up current and the external capacitor. battery charging current starts ramping up when i th voltage reaches 0.8v and full current is achieved with i th at 2v. with a 0.12 f capacitor, time to reach full charge current is about 2ms and it is assumed that input voltage to the charger will reach full value in less than 2ms. the capacitor can be increased up to 1 f if longer input start-up times are needed. input and output capacitors the input capacitor (c2) is assumed to absorb all input switching ripple current in the converter, so it must have adequate ripple current rating. worst-case rms ripple current will be equal to one-half of output charging current. actual capacitance value is not critical. solid tantalum low esr capacitors have high ripple current rating in a relatively small surface mount package, but caution must be used when tantalum capacitors are used for input or output bypass . high input surge currents can be created when the adapter is hot-plugged to the charger or when a battery is connected to the charger. solid tantalum capacitors have a known failure mechanism when subjected to very high turn-on surge currents. only kemet t495 series of ?urge robust?low esr tantalums are rated for high surge conditions such as battery to ground. r2 53.6k c prog 0.0047 f 4008 f06 LTC4008 q1 2n7002 r1 26.7k prog 10 figure 6. 2-level current programming charger voltage programming a resistor divider, r8 and r9 (see figure 10), programs the final float voltage of the charger. the equation for float voltage is (the input bias current of ea is typically ?na and can be ignored): v float = v ref (1 + r8/r9) it is recommended that the sum of r8 and r9 not be less than 100k. accuracy of the LTC4008 voltage reference is 0.8% at 25 c, and 1% over the full temperature range. this leads to the possibility that very accurate (0.1%) resistors might be needed for r8 and r9. actually, the temperature of the LTC4008 will rarely exceed 50 c near the float voltage because charging currents have tapered to a low level, so 0.25% resistors will normally provide the required level of overall accuracy. table 3 contains recom- mended values for r8 and r9 for popular float voltages. 14 LTC4008 4008fa applicatio s i for atio wu uu the relatively high esr of an aluminum electrolytic for c1, located at the ac adapter input terminal, is helpful in reducing ringing during the hot-plug event. refer to appli- cation note 88 for more information. highest possible voltage rating on the capacitor will mini- mize problems. consult with the manufacturer before use. alternatives include new high capacity ceramic (at least 20 f) from tokin, united chemi-con/marcon, et al. other alternative capacitors include os-con capacitors from sanyo. the output capacitor (c3) is also assumed to absorb output switching current ripple. the general formula for capacitor current is: i v v v lf rms bat bat dcin = () ? ? ? ? ? ? ()() 029 1 1 . for example: v dcin = 19v, v bat = 12.6v, l1 = 10 h, and f = 300khz, i rms = 0.41a. emi considerations usually make it desirable to minimize ripple current in the battery leads, and beads or inductors may be added to increase battery impedance at the 300khz switching frequency. switching ripple current splits be- tween the battery and the output capacitor depending on the esr of the output capacitor and the battery imped- ance. if the esr of c3 is 0.2 ? and the battery impedance is raised to 4 ? with a bead or inductor, only 5% of the current ripple will flow in the battery. inductor selection higher operating frequencies allow the use of smaller inductor and capacitor values. a higher frequency gener- ally results in lower efficiency because of mosfet gate charge losses. in addition, the effect of inductor value on ripple current and low current operation must also be considered. the inductor ripple current ? i l decreases with higher frequency and increases with higher v in . ? = ()( ) ? ? ? ? ? ? i fl v v v l out out in 1 1 accepting larger values of ? i l allows the use of low inductances, but results in higher output voltage ripple and greater core losses. a reasonable starting point for setting ripple current is ? i l = 0.4(i max ). in no case should ? i l exceed 0.6(i max ) due to limits imposed by i rev and ca1. remember the maximum ? i l occurs at the maxi- mum input voltage. in practice 10 h is the lowest value recommended for use. lower charger currents generally call for larger inductor values. use table 4 as a guide for selecting the correct inductor value for your application. table 4 maximum input minimum inductor average current (a) voltage (v) value ( h) 1 20 40 20% 1 > 20 56 20% 2 20 20 20% 2 > 20 30 20% 3 20 15 20% 3 > 20 20 20% 4 20 10 20% 4 > 20 15 20% charger switching power mosfet and diode selection two external power mosfets must be selected for use with the charger: a p-channel mosfet for the top (main) switch and an n-channel mosfet for the bottom (syn- chronous) switch. the peak-to-peak gate drive levels are set internally. this voltage is typically 6v. consequently, logic-level threshold mosfets must be used. pay close attention to the bv dss specification for the mosfets as well; many of the logic level mosfets are limited to 30v or less. 15 LTC4008 4008fa applicatio s i for atio wu uu selection criteria for the power mosfets include the ?n resistance r ds(on) , total gate capacitance q g , reverse transfer capacitance c rss , input voltage and maximum output current. the charger is operating in continuous mode so the duty cycles for the top and bottom mosfets are given by: main switch duty cycle = v out /v in synchronous switch duty cycle = (v in ?v out )/v in . the mosfet power dissipations at maximum output current are given by: pmain = v out /v in (i max ) 2 (1 + ? t)r ds(on) + k(v in ) 2 (i max )(c rss )(f osc ) psync = (v in ?v out )/v in (i max ) 2 (1 + ? t)r ds(on) where ? t is the temperature dependency of r ds(on) and k is a constant inversely related to the gate drive current. both mosfets have i 2 r losses while the pmain equation includes an additional term for transition losses, which are highest at high input voltages. for v in < 20v the high current efficiency generally improves with larger mosfets, while for v in > 20v the transition losses rapidly increase to the point that the use of a higher r ds(on) device with lower c rss actually provides higher efficiency. the syn- chronous mosfet losses are greatest at high input volt- age or during a short circuit when the duty cycle in this switch in nearly 100%. the term (1 + ? t) is generally given for a mosfet in the form of a normalized r ds(on) vs temperature curve, but = 0.005/ c can be used as an approximation for low voltage mosfets. c rss = q gd / ? v ds is usually specified in the mosfet characteristics. the constant k = 2 can be used to estimate the contribu- tions of the two terms in the main switch dissipation equation. if the charger is to operate in low dropout mode or with a high duty cycle greater than 85%, then the topside p-channel efficiency generally improves with a larger mosfet. using asymmetrical mosfets may achieve cost savings or efficiency gains. the schottky diode d1, shown in the typical application on the back page, conducts during the dead-time between the conduction of the two power mosfets. this prevents the body diode of the bottom mosfet from turning on and storing charge during the dead-time, which could cost as much as 1% in efficiency. a 1a schottky is generally a good size for 4a regulators due to the relatively small average current. larger diodes can result in additional transition losses due to their larger junction capacitance. the diode may be omitted if the efficiency loss can be tolerated. calculating ic power dissipation the power dissipation of the LTC4008 is dependent upon the gate charge of the top and bottom mosfets (q g1 & q g2 respectively) the gate charge is determined from the manufacturer? data sheet and is dependent upon both the gate voltage swing and the drain voltage swing of the mosfet. use 6v for the gate voltage swing and v dcin for the drain voltage swing. pd = v dcin ?(f osc (q g1 + q g2 ) + i q ) example: v dcin = 19v, f osc = 345khz, q g1 = q g2 = 15nc, i q = 5ma pd = 292mw adapter limiting an important feature of the LTC4008 is the ability to automatically adjust charging current to a level which avoids overloading the wall adapter. this allows the prod- uct to operate at the same time that batteries are being charged without complex load management algo rithms. additionally, batteries will automatically be charged at the maximum possible rate of which the adapter is capable. this feature is created by sensing total adapter output current and adjusting charging current downward if a preset adapter current limit is exceeded. true analog 16 LTC4008 4008fa applicatio s i for atio wu uu control is used, with closed-loop feedback ensuring that adapter load current remains within limits. amplifier cl1 in figure 7 senses the voltage across r cl , connected between the clp and cln pins. when this voltage exceeds 100mv, the amplifier will override programmed charging current to limit adapter current to 100mv/r cl . a lowpass filter formed by 5k ? and 15nf is required to eliminate switching noise. if the current limit is not used, cln should be connected to clp. note that the i cl pin will be asserted when the voltage across r cl is 93mv, before the adapter limit regulation threshold. table 5. common r cl resistor values adapter r cl value* r cl power r cl power rating (a) ( ? ) 1% dissipation (w) rating (w) 1.5 0.06 0.135 0.25 1.8 0.05 0.162 0.25 2 0.045 0.18 0.25 2.3 0.039 0.206 0.25 2.5 0.036 0.225 0.5 2.7 0.033 0.241 0.5 3 0.03 0.27 0.5 * values shown above are rounded to nearest standard value. as is often the case, the wall adapter will usually have at least a +10% current limit margin and many times one can simply set the adapter current limit value to the actual adapter rating (see table 5). designing the thermistor network there are several networks that will yield the desired function of voltage vs temperature needed for proper operation of the thermistor. the simplest of these is the voltage divider shown in figure 8. unfortunately, since the high/low comparator thresholds are fixed internally, there is only one thermistor type that can be used in this network; the thermistor must have a high/low resis- tance ratio of 1:7. if this happy circumstance is true for you, then simply set r9 = r th(low) + clp 15nf 5k r cl * v in LTC4008 16 cln 100mv 15 4008 f07 c in to system load cl1 *r cl = 100mv adapter current limit + figure 7. adapter current limiting setting input current limit to set the input current limit, you need to know the minimum wall adapter current rating. subtract 7% for the input current limit tolerance and use that current to deter- mine the resistor value. r cl = 100mv/i lim i lim = adapter min current (adapter min current ?7%) LTC4008 ntc r9 c7 r th 4008 f08 8 figure 8. voltage divider thermistor network 17 LTC4008 4008fa applicatio s i for atio wu uu if you are using a thermistor that doesn? have a 1:7 high/ low ratio, or you wish to set the high/low limits to different temperatures, then the more generic network in figure 9 should work. once the thermistor, r th , has been selected and the thermistor value is known at the temperature limits, then resistors r9 and r9a are given by: for ntc thermistors: r9 = 6 r th(low) ?r th(high) /(r th(low) ?r th(high) ) r9a = 6 r th(low) ?r th(high) /(r th(low) ?7 ?r th(high) ) where r th(low) > 7 ?r th(high) for ptc thermistors: r9 = 6 r th(low) ?r th(high) /(r th(high) ?r th(low) ) r9a = 6 r th(low) ?r th(high) /(r th(high) ?7 ?r th(low) ) where r th(high) > 7 ?r th(low) example #1: 10k ? ntc with custom limits tlow = 0 c, thigh = 50 c r th = 10k at 25 c, r th(low) = 32.582k at 0 c r th(high) = 3.635k at 50 c r9 = 24.55k 24.3k (nearest 1% value) r9a = 99.6k 100k (nearest 1% value) example #2: 100k ? ntc tlow = 5 c, thigh = 50 c r th = 100k at 25 c, r th(low) = 272.05k at 5 c r th(high) = 33.195k at 50 c r9 = 226.9k 226k (nearest 1% value) r9a = 1.365m 1.37m (nearest 1% value) example #3: 22k ? ptc tlow = 0 c, thigh = 50 c r th = 22k at 25 c, r th(low) = 6.53k at 0 c r th(high) = 61.4k at 50 c r9 = 43.9k 44.2k (nearest 1% value) r9a = 154k sizing the thermistor hold capacitor during the hold interval, c7 must hold the voltage across the thermistor relatively constant to avoid false readings. a reasonable amount of ripple on ntc during the hold interval is about 10mv to 15mv. therefore, the value of c7 is given by: c7 = t hold /(r9/7 ??n(1 ?8 ?15mv/4.5v)) = 10 ?r rt ?17.5pf/(r9/7 ? ln(1 ?8 ?15mv/4.5v) example: r9 = 24.3k r rt = 150k c7 = 0.28 f 0.27 f (nearest value) LTC4008 ntc r9 c7 r9a r th 4008 f09 8 figure 9. general thermistor network 18 LTC4008 4008fa quirement for the wall adapter infet function or blocking diode. wall adapter or acp detection is also removed along with micropower shutdown mode. asserting of the shdn pin only puts the charger into standby mode. failure to isolate the battery power from any of the LTC4008-1 pins when wall adapter power is removed or lost will only drain the battery at the ic quiescent current rate. more specifically, high current is drawn from the dcin, clp and cln pins. suggested devices to isolate power from the charger include simple diodes, electrical or mechanical switches or power path control devices such as the ltc4412 low loss powerpath tm controller. because the switcher operation is continuous under nearly all conditions, precautions must be taken to prevent the charger from boosting the input voltage above maximum voltage values on the input capacitors or adapter. z1 and q3 will shut down the charger if the input voltage exceeds a safe value. applicatio s i for atio wu uu powerpath is a trademark of linear technology corporation. disabling the thermistor function if the thermistor is not needed, connecting a resistor between dcin and ntc will disable it. the resistor should be sized to provide at least 10 a with the minimum voltage applied to dcin and 10v at ntc. do not exceed 30 a. generally, a 301k resistor will work for dcin less than 15v. a 499k resistor is recommended for dcin between 15v and 24v. using the LTC4008-1 (refer to figure 10) the LTC4008-1 is intended for applications where the battery power is fully isolated from the charger and wall adapter connections. an example application is a system with multiple batteries such that the charger? output power passes through a downstream power path or selector system. typically these systems also provide isolation and control the wall adapter power. to reduce cost in such systems, the LTC4008-1 removes the re- 19 LTC4008 4008fa applicatio s i for atio wu uu batmon v fb i cl shdn fault flag ntc r t i th gnd i cl fault flag dcin clp cln tgate bgate pgnd csp bat prog LTC4008-1 r10 32.4k 1% r8 140k 0.25% c6 0.12 f thermistor 10k ntc q3 2n7002 c7 0.47 f r12 100k r11 100k v logic dcin 0v to 28v r7 6.04k 1% r9 15k 0.25% r13 1.5k z1 r t 150k c1 0.1 f c4 15nf q1 q2 d1 c2 20 f system load l1 10 h r1 4.99k 1% r4 3.01k 1% r5 3.01k 1% r sense 0.025 ? 1% r cl 0.02 ? 1% c3 20 f q4 d2 c5 0.0047 f 4008 f10 q5 2n7002 r6 28.7k 1% charge r26 150k li-ion battery d1: mbrs130t3 d2: sbm540 q1: si4431bdy q2: fdc645n q4: si7423dn z1 value sized for absolute maximum adapter voltage figure 10. typical LTC4008-1 application (12.3v/4a) 20 LTC4008 4008fa applicatio s i for atio wu uu pcb layout considerations for maximum efficiency, the switch node rise and fall times should be minimized. to prevent magnetic and electrical field radiation and high frequency resonant prob- lems, proper layout of the components connected to the ic is essential. (see figure 11.) here is a pcb layout priority list for proper layout. layout the pcb using this specific order. 1. input capacitors need to be placed as close as possible to switching fet? supply and ground connections. shortest copper trace connections possible. these parts must be on the same layer of copper. vias must not be used to make this connection. 2. the control ic needs to be close to the switching fet? gate terminals. keep the gate drive signals short for a clean fet drive. this includes ic supply pins that con- nect to the switching fet source pins. the ic can be placed on the opposite side of the pcb relative to above. 3. place inductor input as close as possible to switching fet? output connection. minimize the surface area of this trace. make the trace width the minimum amount needed to support current?o copper fills or pours. avoid running the connection using multiple layers in parallel. minimize capacitance from this node to any other trace or plane. 4. place the output current sense resistor right next to the inductor output but oriented such that the ic? current sense feedback traces going to resistor are not long. the feedback traces need to be routed together as a single pair on the same layer at any given time with smallest trace spacing possible. locate any filter component on these traces next to the ic and not at the sense resistor location. 5. place output capacitors next to the sense resistor output and ground. 6. output capacitor ground connections need to feed into same copper that connects to the input capacitor ground before tying back into system ground. 21 LTC4008 4008fa applicatio s i for atio wu uu pcb layout considerations (cont.) 7. connection of switching ground to system ground or internal ground plane should be single point. if the system has an internal system ground plane, a good way to do this is to cluster vias into a single star point to make the connection. 8. route analog ground as a trace tied back to ic ground (analog ground pin if present) before connecting to any other ground. avoid using the system ground plane. cad trick: make analog ground a separate ground net and use a 0 ? resistor to tie analog ground to system ground. 9. a good rule of thumb for via count for a given high current path is to use 0.5a per via. be consistent. 10. if possible, place all the parts listed above on the same pcb layer. 11. copper fills or pours are good for all power connec- tions except as noted above in rule 3. you can also use copper planes on multiple layers in parallel too?his helps with thermal management and lower trace in- ductance improving emi performance further. 12. for best current programming accuracy provide a kelvin connection from r sense to csp and bat. see figure 12 as an example. it is important to keep the parasitic capacitance on the r t , csp and bat pins to a minimum. the traces connecting these pins to their respective resistors should be as short as possible. 22 LTC4008 4008fa csp 4008 f12 direction of charging current r sense bat figure 12. kelvin sensing of charging current 4008 f11 v bat l1 v in high frequency circulating path bat switch node c2 c3 d1 figure 11. high speed switching path applicatio s i for atio wu uu 23 LTC4008 4008fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio n u gn package 20-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) .337 ?.344* (8.560 ?8.738) gn20 (ssop) 0204 12 3 4 5 6 7 8910 .229 ?.244 (5.817 ?6.198) .150 ?.157** (3.810 ?3.988) 16 17 18 19 20 15 14 13 12 11 .016 ?.050 (0.406 ?1.270) .015 .004 (0.38 0.10) 45 0 ?8 typ .0075 ?.0098 (0.19 ?0.25) .0532 ?.0688 (1.35 ?1.75) .008 ?.012 (0.203 ?0.305) typ .004 ?.0098 (0.102 ?0.249) .0250 (0.635) bsc .058 (1.473) ref .254 min recommended solder pad layout .150 ?.165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale 24 LTC4008 4008fa related parts part number description comments lt 1511 3a constant-current/constant-voltage battery charger high efficiency, minimum external components to fast charge lithium, nimh and nicd batteries lt1513 sepic constant- or programmable- current/constant- charger input voltage may be higher, equal to or lower than battery vol tage, voltage battery charger 500khz switching frequency lt1571 1.5a switching charger 1- or 2-cell li-ion, 500khz or 200khz switching frequency, termination flag ltc1628-pg 2-phase, dual synchronous step-down controller minimizes c in and c out , power good output, 3.5v v in 36v ltc1709 2-phase, dual synchronous step-down controller up to 42a output, minimum c in and c out , uses smallest components for family with vid intel and amd processors ltc1729 li-ion battery charger termination controller trickle charge preconditioning, temperature charge qualification, time or charge current termination, automatic charger and battery detection, and status output lt1769 2a switching battery charger constant-current/constant-voltage switching regulator, input current limiting maximizes charge current ltc1778 wide operating range, no r sense tm synchronous 2% to 90% duty cycle at 200khz, stable with ceramic c out step-down controller ltc1960 dual battery charger/selector with spi interface simultaneous charge or discharge of two batteries, dac programmable current and voltage, input current limiting maximizes charge current ltc3711 no r sense synchronous step-down controller 3.5v v in 36v, 0.925v v out 2v, for transmeta, amd and intel with vid mobile processors ltc4006 small, high efficiency, fixed voltage, lithium-ion complete charger for 3- or 4-cell li-ion batteries, ac adapter current limit battery charger with termination and thermistor sensor, 16-pin narrow ssop package ltc4007 high efficiency, programmable voltage complete charger for 3- or 4-cell li-ion batteries, ac adapter current limit, battery charger with termination thermistor sensor and indicator outputs ltc4100 smart battery charger controller smbus rev 1.1 compliant no r sense is a trademark of linear technology corporation. linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2003 lt/lt 0805 rev a ? printed in usa typical applicatio u batmon v fb i cl acp/shdn fault flag ntc r t i th gnd i cl acp fault flag dcin infet clp cln tgate bgate pgnd csp bat prog LTC4008 r7 6.04k 1% r9 13.3k 0.25% rt 150k c6 0.12 f thermistor 10k ntc c7 0.47 f r12 100k r8 147k 0.25% r10 32.4k 1% r11 100k v logic dcin 0v to 20v c1 0.1 f q3 input switch c4 0.1 f q1 q2 d1 c2 20 f l1 10 h r1 4.99k 1% r4 3.01k 1% r5 3.01k 1% r sense 0.025 ? 1% r cl 0.02 ? 1% c3 20 f nimh battery pack charging current monitor system load r6 26.7k 1% c5 0.0047 f d1: mbrs130t3 q1: si4431bdy q2: fdc645n 4008 ta02 nimh/4a battery charger |
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